A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, e.g a mask (reticle), may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g. including part of one, or several dies) on a substrate (e.g. a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned.
Electrostatic clamps may be used in lithographic apparatuses operating at certain wavelengths, e.g. EUV, since at these wavelengths, certain regions of the lithographic apparatus operates under vacuum conditions. An electrostatic clamp may be provided to electrostatically clamp an object, such as a mask or a substrate (wafer) to an object support, such as a mask table or a wafer table, respectively.
U.S. Pat. No. 4,502,094 (FIGS. 2 and 3) discloses a semiconductor wafer 1 located on an electrostatic chuck (clamp) 2 which includes a thermally conductive support 3, 5 made, of for example aluminum. For positioning the wafer 1 on the chuck, locating pins 13a, 13b are provided so that the flat edge 1a of wafer 1 can abut pins 13a and the rounded edge 1b abuts pin 13b so that the location of the wafer 1 is uniquely defined. The support has a peripheral portion 3 which may be 6 mm thick and a thinner, perforated central portion 5 having a thickness of approximately 3.5 mm. The central portion has perforations or apertures 6 which are circular in cross section with a diameter of 3 mm. The electrostatic chuck 2 also includes thermally conductive portions in the form of copper pillars 7 which are secured in the apertures 6. The pillars 7, which are 6 mm. long and have a diameter of 3 mm, are in thermal contact with the central portion of the support and also with the peripheral portion 3 which because of its relatively large size, can act as a heat sink.
The pillars 7 have flat end faces 8 which lie in the same fixed plane so that the semiconductor wafer 1 can bear on them as well as on the major surface 9 of the peripheral portion 3 of the support. In this way, the wafer can be supported in a fixed plane relative to the electrostatic chuck 2. Moreover, because the pillars 7 are made of metal they are electrically (as well as thermally) conductive so that the semiconductor wafer 1 is electrically contacted at its back surface (i.e. the surface facing the electrostatic chuck 2) by the pillars 7.
The chuck 2 also has an electrically conductive member in the form of a grid electrode 10 which may be made of, for example, aluminum. Essentially the grid 10 is circular, having a diameter of 90 mm and a thickness of 1.3 mm. The meshes of the grid 10 are constituted by circular apertures 11 which have a diameter of 5 mm. The grid 10 has parts which extend between the pillars 7 because it is located such that the pillars 7 extend through the apertures 11, but the pillars 7 and grid 10 are mutually insulated by a layer of dielectric material 12. The layer 12 of dielectric material which may be, for example, an epoxy resin surrounds the grid 10 so that, in addition to insulating the grid from the pillars 7 the grid 10 is also insulated from the central portion 5 of the support. The separation of the grid 10 from both the pillars 7 and the central portion 5 of support 2 is, for example, 1 mm, the dielectric layer 10 filling the whole space between these various members. In addition the dielectric layer is present on the upper surface of grid 10 but this part of layer 10 has a thickness of approximately 200 micrometers. As explained in more detail hereinafter, the pillars 7 may protrude from the dielectric layer 12 so that the semiconductor wafer 1 is spaced apart from layer 12 by approximately 10 micrometers.
To hold the semiconductor wafer 1 against the chuck 2 a potential difference is applied between the wafer 1 and the grid electrode 10. Typically this potential difference is 4 kV. Electrical contact is made to the back surface of wafer 1 via pillars 7 from the support 2 and a bias potential of, for example, approximately 4 kV is applied to grid 10 via an electrical connection 4 extending through the central portion 5 of the support and through the dielectric layer 12. Thus an electrostatic clamping force is established across the dielectric layer 12 so that the wafer 1 is held in a fixed plane against the pillars 7 of the chuck 2. The magnitude of the clamping force is proportional to the square of the potential difference between wafer 1 and electrode 10, directly proportional to the dielectric constant of layer 12, and inversely proportional to the square of the distance between the wafer 1 and the grid 10.
FIG. 3 is a plan view, taken from above, of the semiconductor wafer and the chuck of FIG. 2 the semiconductor wafer being partially cut away. FIG. 2 shows a cross section along the line I-I′ of FIG. 3. As shown in FIG. 3, the chuck 2 has a symmetrical distribution of pillars 7. In order to hold the wafer evenly against the chuck, it is preferable that the pillars 7 are relatively closely spaced to avoid localized bowing of the wafer. This is also consistent with the need to avoid temperature variations across the wafer 1. The greater the number of pillars 7 and the closer is their spacing the more efficient can be the transfer of heat from the wafer to the thick peripheral heat sink 3 of the support. But, as far as the number of pillars is concerned, a compromise has to be reached because the contact pressure due to electrostatic attraction is reduced as the number of pillars 7 is increased. However, because the pillars 7 protrude from dielectric layer 12, the wafer 1 contacts the chuck 2 only at the end faces 8 of the pillars 7 and at the inner periphery of the major surface 9. By limiting the contact area in this way the contact pressure (i.e. force per unit area) is maximized. This is beneficial because the efficiency of heat transfer between the wafer 1 and the pillars 7 depends on the contact pressure.
The object which is clamped on the electrostatic clamp needs to positioned with a very high accuracy on the electrostatic clamp and the position of the object on the electrostatic clamp needs to be stable over time.